1. Field
This invention pertains to the field of multi-lane transceivers that map a plurality of virtual or logical lanes to a plurality of physical lanes, for example C form-factor pluggable (CFP) optical transceiver modules for 100 Gigabit Ethernet systems that employ a multiplexing technique such as wavelength division multiplexing (WDM).
2. Description
Multi-lane transmission is commonly employed to transmit a high data rate data signal over several parallel transmission links. At the transmit side, a data signal is distributed into a number (M) of sub-channels (referred to herein as virtual lanes or logical lanes) which are then mapped onto N transmission channels (herein referred to as physical lanes) for transmission, possibly together with some overhead information. For example, multi-lane transmission is employed in 10 Gbps Ethernet (10 GBASE-LX4) devices and systems, where a 10 Gbps stream is distributed to M=4 (four) virtual lanes (each virtual lane comprising a corresponding electrical signal) which in turn are mapped onto N=4 (four) physical lanes in the form of four optical channels on four different wavelengths on one fiber (4:4 mapping) using wavelength division multiplexing (WDM) with a fixed mapping scheme (IEEE 802.3 Part 4).
This fixed mapping scheme makes it easy to: (1) identify the corresponding optical channel when a specific virtual lane is corrupted; (2) use an optical spectrum analyzer (OSA) to extract the physical (optical) lane associated with a particular virtual lane; and (3) introduce defined impairments into a physical (optical) lane associated with a particular virtual lane.
However, in IEEE standard 100 GBps Ethernet systems, there is no unique or fixed allocation of virtual lanes to physical lanes (e.g., optical wavelengths), and due to the dynamic M:N mapping, there may be a multiplex of several virtual lanes on one physical lane.
FIG. 1 illustrates one example of a transceiver 100 that maps a plurality of virtual or logical lanes to a plurality of physical lanes. In particular, FIG. 1 illustrates a C form-factor pluggable (CFP) optical transceiver module for a 100 Gbps Ethernet system. Transceiver 100 includes: an M:N mapper 110, transmit optics 120, an optical multiplexer 130, an optical demultiplexer 140, receive optics 150, an N:M demapper 160, and in some embodiments a controller 170 connected to a management data input/output (MDIO) interface.
M:N mapper 110, which is a multiplexer and sometimes referred to as a “gearbox,”maps M virtual lanes (each virtual lane comprising a corresponding electrical signal) to N physical lanes in the form of wavelength division multiplexed (WDM) optical channels.
In the particular example embodiment, where transceiver 100 is a CFP optical transceiver module for a 100 Gbps Ethernet system, M:N mapper 110 maps M=10 (ten) virtual lanes (electrical signals) each at 10 Gbps into N=4 (four) physical lanes (e.g., optical wavelengths) each at 25 Gbps.
At the receive side, N:M demapper 160, which also may be referred to as a gearbox, demultiplexes the N physical lanes (e.g., optical wavelengths) to the M virtual lanes (electrical signals).
The integrated circuit(s) with M:N mapper 110 and N:M demapper 160 include(s) a range of fast mux/demux paths whose start-up position is not known. As a result, the actual mapping of the virtual lanes to the physical lanes is not fixed or pre-determined. Instead, M:N mapper 110 starts in a random mapping state, and each time that the M:N mapper 110 is restarted, the mapping between virtual lanes and physical lanes may change. Therefore a user or tester of transceiver 100 cannot know a priori which of the virtual lanes (electrical signals) are mapped or assigned to a given physical lane (i.e., optical wavelength).
Knowing which virtual lanes (electrical signals) are mapped to a particular physical lane (i.e., optical wavelength) can be important during the development and testing phase of an optical transceiver, as the mapping can affect the performance of each individual virtual lane and optical lane. For example, without knowing which virtual (electrical) lanes are mapped to which physical (optical) lanes makes it difficult to determine the operational bit-error-rate (BER) of each physical (optical) lane. This in turn can make it difficult to identify, diagnose, and/or troubleshoot any problems that may occur for a particular physical lane.
Accordingly, it would be advantageous to provide a system and method of ascertaining the current mapping between virtual lanes and physical lanes in a transceiver where the mapping between virtual lanes and physical lanes is not fixed and therefore not known a priori. It would also be advantageous to provide a system and method of determining bit error rates (BERs) of physical lanes in a transceiver where there is no fixed mapping between virtual lanes and physical lanes. Other and further objects and advantages will appear hereinafter.
The present invention comprises a method and system for ascertaining the current mapping between virtual lanes and physical lanes in a multi-lane transceiver.
In one aspect of the invention, for an apparatus which communicates data of a number of virtual lanes over a number of physical lanes, where the number of virtual lanes is different than the number of physical lanes and where a mapping between the virtual lanes and the physical lanes is not fixed, a method is provided for ascertaining the mapping between the virtual lanes and the physical lanes. The method comprises: (a) applying an impairment to a communication capability of one of the physical lanes so as to increase bit errors for data communicated via said one physical lane; (b) determining a test bit error rate for each of the plurality of virtual lanes while the impairment is applied to the communication capability of the one physical lane; and (c) ascertaining from the test bit error rates which of the virtual lanes is/are mapped to the one physical lane whose communication capability was impaired
In another aspect of the invention, a system is provided for testing an apparatus which communicates data of a number of virtual lanes over a number of physical lanes, where the number of virtual lanes is different than the number of physical lanes and where a mapping between the virtual lanes and the physical lanes is not fixed. The system comprises: a controller configured to supply a control signal to selectively impair a communication capability of one or more of the physical lanes; a bit error rate tester configured to determine a test bit error rate of the virtual lanes while the communication capability of the one or more physical lanes is impaired, and a graphical user interface configured to provide an indication of at least one of: (1) the test bit error rates of the virtual lanes while the communication capability of the one or more physical lanes is impaired; and (2) the mapping between the virtual lanes and the physical lanes of the apparatus.